| Title | : | MS Seminar |
| Speaker | : | Amit Tiwari (IITM) |
| Details | : | Thu, 12 Dec, 2024 3:30 AM @ SSB 334 |
| Abstract: | : | With the rise of multi-core processors, parallel programming has become essential,and managing synchronization overheads has become crucial for efficiency. Barriers, commonly used to synchronize threads, divide the program into different phases. Existing scheduling schemes address intra-phase load imbalance to some extent but do not fully resolve the issue of thread idling, especially in the context of programs with irregular parallel for-loops. This thesis proposes an innovative solution called the elastic-barrier, where threads that arrive early at a barrier can execute iterations of the parallel-loop from the next phase, thereby reducing the idle time, and minimizing load imbalance. The approach guarantees safety by ensuring that before executing any work W from the subsequent phase, all the works in the current phase that W depends on have been executed. The thesis presents a compilation scheme that integrates compile-time and runtime techniques to optimize execution. The proposed scheme is implemented in the IMOP framework. Experimental results on graph-based benchmarks show that the approach improves the performance significantly. Across five benchmark programs, each running using three real-world datasets on two servers with varying number of threads (total leading to 540 configurations), the proposed scheme leads to improvement in 479 configurations. |
